GlaCE™by Pioneer
A finished GlaCE glass disk, its inner hole and outer edge catching the light

GlaCE™ by Pioneer · Taiwan

The edge decides whether thin glass survives.

GlaCE™ cuts thin glass and forms its finished, chamfered edge in one ultrafast-laser sequence. It started on the glass platters of next-generation hard disk drives. The same edge problem now limits co-packaged optics and glass-core semiconductor packaging.

See the HDD resultsContact us

A finished GlaCE™ disk

2peer-reviewed papers in 2026, in Manufacturing Letters and the Journal of Applied Physics
0 / 40edges with chips or cracks above the operational threshold in a published ten-disk lot
≤ 1.6 µmlongest residual surface feature at 10,000×, on under 1% of the chamfer face
Tier-1global HDD manufacturer evaluating samples; name shared under NDA

One process, three businesses

Where a crack-free glass edge pays

GlaCE

HDD glass media

Cut, inner hole and both chamfers of a 3.5-inch glass platter in one fixture.

Customer evaluationGlaCE →

GlaCE Plus Photonics

Co-packaged optics

Glass parts that hold fibers in place where they meet the photonic chip.

In developmentPhotonics →

GlaCE Plus Semi

Glass-core packaging

Panel singulation and hole edges for glass-core substrates.

FeasibilitySemi →

Why now

All three markets are moving to glass at once

HDD

Toshiba verified 12-disk stacking in October 2025 by moving from aluminium to thinner glass substrates, and targets 40 TB-class drives in 2027.1

Photonics

Co-packaged optics entered mass production in 2026. NVIDIA began shipping Spectrum-X CPO switches and Broadcom its 51.2T Bailly switch; TrendForce expects volume ramp in 2027–2028.2

Semiconductor

Glass-core substrates are reaching pilot and early production. Absolics targets mass production by the end of 2026, Samsung Electro-Mechanics a plant in H2 2027, and TSMC’s panel-level CoPoS mass production in H2 2028.3

How a project runs

From your glass to a production decision

  1. Mutual NDA

    Two signatures, then we share sample data and the details behind this site.

  2. Samples on your glass

    We process your glass or parts on our prototype platform in Taiwan.

  3. Your evaluation

    Your lab measures; we review the results with your engineers.

  4. Equipment or licence

    Production equipment, process licensing or joint development, depending on fit.

Sources

  1. Toshiba, “Toshiba First in Industry to Verify 12-Disk Stacking Technology for Hard Drives”, 14 Oct 2025
  2. TrendForce, “NVIDIA and Broadcom Begin Volume Ramp of CPO Switches…”, 27 Jul 2026
  3. Tom’s Hardware, “Glass substrate roadmaps examined”, 27 Aug 2026

GlaCE · HDD glass media Customer evaluation

Laser edge-forming for glass HDD substrates

High-capacity drives are moving from aluminium to glass platters, and each new design stacks more, thinner platters. The thinner the glass, the more its edge decides strength and yield. GlaCE™ forms that edge without grinding.

Thinner glass, same flaw

Glass fails at its largest flaw. Mechanical scribing, grinding and chamfering remove material by brittle micro-fracture. The visible chips are the smaller part; median and lateral cracks sit below the finished surface and set the weak tail of the strength distribution.

More platters per drive means thinner substrates: the 0.455 mm class today, moving toward the 0.381 mm class. The same edge flaw then takes a larger share of the section, while clamping, spin and handling loads stay.

  • Seagate’s HAMR platform, Mozaic 3+, grows its iron-platinum media on a glass substrate.1
  • Toshiba verified 12-disk stacking in October 2025, replacing aluminium with a thinner glass substrate; 40 TB-class drives are targeted for 2027.2
0.455 mm class 0.381 mm class
The same edge cracks (orange) take a larger share of a thinner section. Schematic.

The target part

A 3.5-inch disk, cut and chamfered on every edge

OD edge ID edge 0.455 mm 45° chamfer
Schematic. The published study used 97 mm OD × 25 mm ID × 0.455 mm glass disks, with 45° chamfers on the upper and lower corners of both the inner (ID) and outer (OD) edges.

A finished platter blank has four edge corners: upper and lower, on the inner hole and on the outside. Today each is ground and chamfered with diamond tools, in several stations, with coolant and slurry.

GlaCE™ forms all four in one fixture. The inner and outer edges share one axis of rotation, so their concentricity comes from the setup rather than from repeated alignment.

The process

Three laser stages, one fixture

1Bottom chamfer2Vertical cut3Top chamferDisk side on the left of each panel; amber marks the laser-formed edge faces. Schematic, not to scale.

  1. Bottom chamfer

    Ultrafast-laser ablation from the underside forms the lower 45° chamfer.

  2. Vertical cut

    A single-pass filament through the full thickness defines the inner and outer separation boundary.

  3. Top chamfer

    The upper chamfer is formed after the cut, so the cut track stops any crack before it reaches the bulk.

No grinding wheels, slurry or chemical etch in the forming step. The three-stage sequence is published in Manufacturing Letters 49 (2026).3 The production process window is held as a trade secret.

Scope

What GlaCE changes, and what it leaves alone

Step in a glass-disk flowWith GlaCE™
Core and outer-diameter cutReplaced laser cut
Inner and outer diameter grindingReplaced
Edge chamfering, both facesReplaced laser-formed 45° chamfers
Edge polishRetained today a laser edge-polish step is in development
Main-surface lapping, polishing and CMPNot touched
Media deposition and glass compositionNot touched

GlaCE™ changes how the edge is made. It does not change the data surface, the coating or the glass.

Published results

What the papers report

ResultValueSource
Defect classes for laser-cut glass edges3: inner cracking, residue, inner chippingManuf. Lett. 2026
Inner cracks, 3rd-generation process15–35 µmManuf. Lett. 2026
Inner cracks, 4th-generation processNoneManuf. Lett. 2026
Edges with chips or cracks above threshold (ten disks, optical microscope)0 of 40J. Appl. Phys. 2026
Longest residual surface feature (SEM, 10,000×)≤ 1.6 µm long, < 0.3 µm wide, < 1% of the faceJ. Appl. Phys. 2026
Roughness of the laser-cut faceSa 0.36 µmManuf. Lett. 2026

Operational threshold: no crack 0.5 µm or wider, or 5 µm or longer.4

Seeing the edge

Microscope and SEM evidence

Select any image to enlarge it.

Same glass, same laser: an earlier edge (left) with micro-cracks and chipping, and the GlaCE™ edge (right). Optical microscope, 50 µm bars. J. Appl. Phys. 140, 123110, Fig. 6.
Chamfer face at 2,000× with a 10,000× inset: the longest hairline is 1.6 µm, on under 1% of the face. J. Appl. Phys., Fig. 11.
Cross-section, 200×: top chamfer, cut wall and bottom chamfer from one process. J. Appl. Phys., Fig. 9.
Chamfer face, 1,000×: uniform ablation texture and no edge chipping. J. Appl. Phys., Fig. 10.
4th-generation edges, inner (ID) and outer (OD): top chamfer, cut wall, bottom chamfer. Manuf. Lett. 49, Fig. 4.

Latest samples · July 2026

Fifth generation, under production conditions

Inner edge (ID), 100×
Outer edge (OD), 100×
Cut wall, 2,000×
ID chamfer face, 10,000×: smooth, rounded ablation texture; no hairline cracks visible in this field.
Representative SEM views of the three-stage process: the cut wall with the chamfered areas on each side.

Where the program stands

  • Multi-round sample evaluation with a Tier-1 global HDD manufacturer, with its engineering, sourcing and business teams engaged.
  • Prototype platform running in Taiwan with our equipment development partner; production tools follow customer qualification.
  • Fifth-generation images show morphology only; batch statistics on this generation are in progress.

For glass-substrate makers, media makers and drive makers. Ask for samples on your glass →

Sources

  1. HWCooling, “HAMR disks are here. Seagate launches Mozaic 3+” (2024)
  2. Toshiba, “Toshiba First in Industry to Verify 12-Disk Stacking Technology for Hard Drives”, 14 Oct 2025
  3. S.-J. Liu, Y.-W. Wang, Manufacturing Letters 49 (2026) 87–92, doi:10.1016/j.mfglet.2026.07.082
  4. S.-J. Liu, Y.-W. Wang, J. Appl. Phys. 140, 123110 (2026), doi:10.1063/5.0337176

GlaCE Plus Photonics · co-packaged optics In development

Glass parts that hold fibers in place

Co-packaged optics moves the optical engine next to the switch chip. Every fiber must then meet the photonic chip with sub-micron accuracy, at volume. Glass is the natural material for the parts that hold those fibers, and the edge and hole quality that matters on an HDD platter matters here too.

The market

Co-packaged optics reached mass production in 2026

NVIDIA

Began shipping its Spectrum-X CPO switch to select partners. It is built with TSMC’s COUPE packaging and offers up to 400 Tb/s of switching capacity.1

Broadcom

Its 51.2T Bailly CPO switch is in volume manufacturing with Delta Electronics and Micas Networks, and uses up to 70% less power than pluggable transceivers.1

Outlook

TrendForce expects the CPO switch market to reach volume ramp in 2027–2028, with optical-engine yield and advanced-packaging capacity as the bottlenecks.1

Where fiber attach gets hard

Alignment
Single-mode fibers have to sit within a fraction of a micrometre of the chip’s couplers, for every channel.
Assembly time
Aligning each array while measuring light through it is slow and costly as fiber counts grow.
Adhesives
Epoxy shrinkage and ageing can move fibers after alignment and make rework difficult.
Service
A permanent attach makes it hard to test a module or replace a fiber.

What we bring

The same ultrafast-laser platform that forms crack-free glass edges for HDD media also forms edges and holes in thin glass parts, with control of the beam’s angle to the surface.

We are developing glass-based fiber-attach parts for co-packaged optics with photonics partners. Designs, data and patent status are shared under NDA.

Send us a part drawing or a coupling requirement →

Published routes

How precise features are made in glass today

RouteHow it worksTypical strengthsTypical limits
Mechanical drilling and grindingDiamond tools remove materialSimple; low capitalChipping and sub-surface cracks; tool wear; small features are hard
Laser ablation (percussion or trepanning)Pulses remove material layer by layerNo tooling; flexible geometryTaper, and cracked or heat-affected walls unless the process is controlled; slow for deep holes
Laser modification plus wet etchA laser writes a modified track that a chemical etch then opensSmooth, crack-free walls; high aspect ratioWet-chemical step and etch time; geometry set by etch selectivity
Laser filament plus cleaveA line-focus beam writes a separation plane that is then cleavedFast straight cutsMainly for cutting; edges still need chamfering

General characteristics as reported in the literature; not a ranking of any supplier.

Sources

  1. TrendForce, “NVIDIA and Broadcom Begin Volume Ramp of CPO Switches…”, 27 Jul 2026

GlaCE Plus Semi · glass-core packaging Feasibility

Crack-free edges for glass-core substrates

Glass cores bring flatness, dimensional stability and fine through-glass vias to large AI packages. Their weak point is the same as an HDD platter’s: glass chips and cracks at its edges during drilling and dicing.

The roadmap

Publicly reported status, 2026

CompanyStatus as publicly reported
Absolics (SKC)Mass-production samples in Q1 2026 and customer qualification; mass production targeted by the end of 2026, phase-1 capacity 12,000 m² a year.1
IntelShowed a thick-core glass substrate with embedded EMIB bridges at NEPCON Japan in January 2026 and reported no micro-cracking (“SeWaRe”) issues in testing; TrendForce places commercialization around 2030.1,2
Intel with 3D Glass SolutionsAbout US$3.3 billion substrate plant in Odisha, India, with a five-to-six-year buildout, per the Indian government.3
Samsung Electro-MechanicsGLASEM joint venture with Dongwoo Fine-Chem formed in July 2026; Pyeongtaek plant targeted for H2 2027.1
LG InnotekPrototypes delivered in 2024; production targeted for 2027–2028.1
TSMCPanel-level CoPoS pilot in 2027 and mass production in H2 2028; glass integration still under review.1
Dai Nippon PrintingPilot operation since December 2025; mass production targeted for FY2028.1

The edge, in public reporting

  • Glass chips and cracks at the edges during drilling and dicing.1
  • Early production runs at one maker reportedly broke hundreds of panels every couple of days (MIT Technology Review, March 2026, via Tom’s Hardware).1
  • An edge coating reduced measured edge stress from 95 MPa to 49 MPa: the industry is treating the edge after the cut.1

GlaCE Plus forms the cut and its chamfers in one pass, so the edge leaves the singulation step without the crack population that coatings are added to contain.

Panel singulation: cut and chamfer in one pass; amber marks the processed edge.
Dicing-street cross-section: chamfers on both faces, formed during the cut.
Singulated unit, package-ready edges.
Through-glass via and hole edges.

Edge clearance is wiring area

How much of a unit the keep-out band costs

Designers keep circuits away from a unit’s edge to allow for singulation damage. Published glass-core build-up pull-backs are mostly 50–150 µm,4 and finite-element work has used about 300 µm for via-to-edge distance.5 Every micrometre of that band is area that cannot carry wiring. A cleaner edge lets it shrink.

+10.9% routable area

Routable share of the unit: 88.4% → 98.0%

Keep-out band today Boundary with a cleaner edge

Illustrative geometry for a square unit: routable fraction = (1 − 2w / L)². Not measured data.

Where the program stands

  • Edge metrics measured on annular borosilicate coupons; transfer to package glass cores is being verified.
  • Paper accepted at IEEE EDAPS 2026, 14–16 December, IIT Ropar, India.
  • Looking for substrate makers and OSATs with glass panels or units to process.

Discuss a feasibility run →

Sources

  1. Tom’s Hardware, “Glass substrate roadmaps examined”, 27 Aug 2026
  2. TrendForce, “Intel reportedly presents first thick-core glass substrate with EMIB”, 26 Jan 2026
  3. TrendForce, “Intel advances glass substrate push with 3DGS; US$3.3 billion India plant”, 1 Jun 2026
  4. Toppan, US Patent 10,679,865 (glass-core wiring substrate)
  5. Le, Yoo & Choa, Micromachines 16(11):1256 (2025)

Science

Peer-reviewed, and open to inspection

We publish the physics and the results. The production process window stays a trade secret.

Publications

Manufacturing Letters 49 (2026) 87–92 · published

Zero-crack laser singulation of thin glass disks for next-generation hard disk drives: a three-stage hybrid ultrafast process

S.-J. Liu, Y.-W. Wang

The three-stage process (bottom chamfer, vertical cut, top chamfer) on 0.455 mm glass disks, a three-category classification of laser edge defects, and the elimination of inner cracks from the 3rd to the 4th generation.

doi:10.1016/j.mfglet.2026.07.082

Journal of Applied Physics 140, 123110 (2026) · published

Physics-based damage prediction index model and angle-matched ultrafast-laser chamfering of amorphous glass substrates

S.-J. Liu, Y.-W. Wang

A dimensionless Damage Index predicts where laser-induced cracks start in glass; matching the beam to the chamfer face removed above-threshold cracking on 40 of 40 edges.

doi:10.1063/5.0337176

IEEE EDAPS 2026 · accepted · 14–16 December, IIT Ropar

Edge clearance in panel-level glass-core substrates: measured damage extent and an interconnect cost model

S.-J. Liu, C.-M. Wang

Measured edge damage on laser-processed glass coupons and what it means for the edge keep-out rule of glass-core packages.

SWTest Asia 2026 · podium · 5–6 November, Hsinchu

Solder-free micro coaxial spring probes for advanced-package test: fluxless fine-spot laser weld characterization and an automated eight-station assembly platform

S.-J. Liu

From Pioneer’s probe business: laser welding applied to test probes for advanced packages.

The physics

Predict the damage, then route around it

Ψ = k0 · M · Φ · P

The Damage Index multiplies four factors: geometry, the glass’s susceptibility, the energy flux that penetrates the bulk, and pulse accumulation. At Ψ = 1 the stress at a flaw reaches the glass’s fracture toughness and cracks start.

The model explains why a laser striking the chamfer wall at the wrong angle drives cracks into the glass, and how delivering it matched to the chamfer face keeps the energy inside the material being removed.2

The three defect classes used as acceptance criteria: inner cracking, residue and inner chipping. Manuf. Lett. 49, Fig. 3.

Sources

  1. S.-J. Liu, Y.-W. Wang, Manufacturing Letters 49 (2026) 87–92, doi:10.1016/j.mfglet.2026.07.082
  2. S.-J. Liu, Y.-W. Wang, J. Appl. Phys. 140, 123110 (2026), doi:10.1063/5.0337176

Company

GlaCE™ by Pioneer

Pioneer Probe Pins Technology Co., Ltd. is a fabless engineering company in Taiwan with a semiconductor test-probe background: probe cards, test sockets and spring probes. GlaCE™ is its glass laser edge-forming line; the process and IP are developed and owned by Pioneer. PioneerX Holdings, Inc. (Delaware) is the US company.

The name

GlaCE comes from Glass + Chamfered Edge, which is exactly what we deliver: a properly chamfered glass edge. It also happens to be the French word glace (glass, ice), and it reads close to “glass”, so it is easy to say and remember for overseas customers.

IP and brand

  • Patent applications filed in Taiwan; international filings in progress.
  • GlaCE™ trademark applications filed in Taiwan for machines, laser processing and R&D services; US filing to follow.
  • The production process window is held as a trade secret and is never published.

Ways to work together

Four models, chosen per partner

Sample processing

Your glass, our platform, your measurements.

Equipment

Production tools built with our equipment partners, with service.

Process licensing

The GlaCE™ process on qualified platforms.

Joint development

New glass parts and formats with substrate makers, OSATs and photonics companies.

For investors

What is in place

  • Two peer-reviewed papers on the process and its physics, and a third accepted.
  • A Tier-1 HDD manufacturer evaluating samples.
  • A prototype platform running in Taiwan.
  • Patent and trademark filings; a US holding company.

Business plan, data and terms are shared under NDA.

Contact

Talk to us

Technology, samples and Taiwan

Song-Jhe (Johnny) Liu

Chairman & CEO, Pioneer Probe Pins Technology Co., Ltd.
President & CEO, PioneerX Holdings, Inc.

Corporate, PioneerX Holdings

Ming Wei (Mark) Hsu

Co-founder and Director, PioneerX Holdings, Inc.

Commercial and partnerships, United States

Eytan Wiener

Potentiate Ventures

Strategic advisor to PioneerX, working with Scott Deetz of Northbound Group.

General enquiries and sample requests

Pioneer Probe Pins sales

Pioneer Probe Pins Technology Co., Ltd., Taiwan

Administration, Taiwan

Abby

Pioneer Probe Pins Technology Co., Ltd.

Pioneer Probe Pins Technology Co., Ltd. · Tamsui, New Taipei City, Taiwan · pioneerprobes.com